diff --git a/dts/riscv/riscv32-fe310.dtsi b/dts/riscv/riscv32-fe310.dtsi
index 2502516c5d7199b465876ef2cb6dd0d0a374341d..36266086bb1ec0aefda0dfa6652f3ba1ca315cee 100644
--- a/dts/riscv/riscv32-fe310.dtsi
+++ b/dts/riscv/riscv32-fe310.dtsi
@@ -45,7 +45,9 @@
 			reg-names = "control";
 		};
 		clint: clint@2000000 {
+			#interrupt-cells = <1>;
 			compatible = "riscv,clint0";
+			interrupt-controller;
 			interrupts-extended = <&hlic 3 &hlic 7>;
 			reg = <0x2000000 0x10000>;
 			reg-names = "control";