From 26b6d43fce49af72c4418dc3446b68c7c01bc18b Mon Sep 17 00:00:00 2001 From: Katsuhiro Suzuki <katsuhiro@katsuster.net> Date: Thu, 22 Oct 2020 10:49:12 +0900 Subject: [PATCH] dts: riscv32-fe310: add missing clint properties RISC-V clint is an interrupt controller but it has no required properties (#interrupt-cells and interrupt-controller). This patch just adds missing properties. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> --- dts/riscv/riscv32-fe310.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/dts/riscv/riscv32-fe310.dtsi b/dts/riscv/riscv32-fe310.dtsi index 2502516c5d7..36266086bb1 100644 --- a/dts/riscv/riscv32-fe310.dtsi +++ b/dts/riscv/riscv32-fe310.dtsi @@ -45,7 +45,9 @@ reg-names = "control"; }; clint: clint@2000000 { + #interrupt-cells = <1>; compatible = "riscv,clint0"; + interrupt-controller; interrupts-extended = <&hlic 3 &hlic 7>; reg = <0x2000000 0x10000>; reg-names = "control"; -- GitLab