diff --git a/arch/arm/core/aarch64/arm_mmu.c b/arch/arm/core/aarch64/arm_mmu.c
index 2445d551072e871891bc2fccc2565e5952cc71c0..a8128cb37d4c0302155f59aa12453d64d582a6c7 100644
--- a/arch/arm/core/aarch64/arm_mmu.c
+++ b/arch/arm/core/aarch64/arm_mmu.c
@@ -405,6 +405,8 @@ static void enable_mmu_el1(unsigned int flags)
 	/* Ensure these changes are seen before MMU is enabled */
 	__ISB();
 
+	MMU_DEBUG("Set MAIR, TCR and TBBR registers.\n");
+
 	/* Enable the MMU and data cache */
 	__asm__ volatile("mrs %0, sctlr_el1" : "=r" (val));
 	__asm__ volatile("msr sctlr_el1, %0"
@@ -415,6 +417,8 @@ static void enable_mmu_el1(unsigned int flags)
 	/* Ensure the MMU enable takes effect immediately */
 	__ISB();
 
+	/* TODO: raspi3: why is uart broken after this? */
+
 	MMU_DEBUG("MMU enabled with dcache\n");
 }
 
@@ -450,7 +454,6 @@ static int arm_mmu_init(const struct device *arg)
 	setup_page_tables();
 
 	/* currently only EL1 is supported */
-	MMU_DEBUG("enable_mmu_el1\n");
 	enable_mmu_el1(flags);
 
 	return 0;