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Commit 81b4b7ab authored by Ivan Podogov's avatar Ivan Podogov
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ARM: dts: msm: optimize Sturgeon panel tear check configuration

This helps to avoid the janky state, when refreshing the screen at
60fps leads to waiting for the vsync to swap buffers on every frame.

Bug: 30141461
parent b99a920d
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...@@ -87,7 +87,9 @@ ...@@ -87,7 +87,9 @@
qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>; qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable; /* qcom,mdss-dsi-te-check-enable; */
/* clk = (340+40+40+20) * (340+16+16+2) * 24bpp * 66fps */
qcom,mdss-dsi-panel-clockrate = <260663040>;
qcom,mdss-dsi-te-using-te-pin; qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00]; qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00];
qcom,mdss-dsi-t-clk-post = <0x3c>; qcom,mdss-dsi-t-clk-post = <0x3c>;
......
...@@ -82,7 +82,9 @@ ...@@ -82,7 +82,9 @@
qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>; qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable; /* qcom,mdss-dsi-te-check-enable; */
/* clk = (400+40+40+20) * (400+16+16+2) * 24bpp * 66fps */
qcom,mdss-dsi-panel-clockrate = <343728000>;
qcom,mdss-dsi-te-using-te-pin; qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00]; qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00];
qcom,mdss-dsi-t-clk-post = <0x3c>; qcom,mdss-dsi-t-clk-post = <0x3c>;
......
...@@ -201,7 +201,9 @@ ...@@ -201,7 +201,9 @@
qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>; qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable; /* qcom,mdss-dsi-te-check-enable; */
/* clk = (400+40+40+20) * (400+18+18+2) * 24bpp * 66fps */
qcom,mdss-dsi-panel-clockrate = <346896000>;
qcom,mdss-dsi-te-using-te-pin; qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00]; qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00];
qcom,mdss-dsi-t-clk-post = <0x3c>; qcom,mdss-dsi-t-clk-post = <0x3c>;
......
...@@ -84,7 +84,9 @@ ...@@ -84,7 +84,9 @@
qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>; qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable; /* qcom,mdss-dsi-te-check-enable; */
/* clk = (400+40+40+20) * (400+18+18+2) * 24bpp * 66fps */
qcom,mdss-dsi-panel-clockrate = <346896000>;
qcom,mdss-dsi-te-using-te-pin; qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00]; qcom,mdss-dsi-panel-timings = [6A 16 0E 00 38 3C 12 18 2A 03 04 00];
qcom,mdss-dsi-t-clk-post = <0x3c>; qcom,mdss-dsi-t-clk-post = <0x3c>;
......
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