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Commit a4c5313a authored by Satyanarayana Dash's avatar Satyanarayana Dash
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arm64: issue isb when trapping CNTVCT_EL0 access


Bug: 68266545
Change-Id: I6005a6e944494257bfc2243fde2f7a09c3fd76c6
Signed-off-by: default avatarSatyanarayana Dash <sadash@codeaurora.org>
parent 9a5b8efc
No related merge requests found
...@@ -34,6 +34,7 @@ ...@@ -34,6 +34,7 @@
#include <asm/arch_timer.h> #include <asm/arch_timer.h>
#include <asm/atomic.h> #include <asm/atomic.h>
#include <asm/barrier.h>
#include <asm/debug-monitors.h> #include <asm/debug-monitors.h>
#include <asm/esr.h> #include <asm/esr.h>
#include <asm/traps.h> #include <asm/traps.h>
...@@ -387,6 +388,7 @@ static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs) ...@@ -387,6 +388,7 @@ static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
{ {
int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
isb();
if (rt != 31) if (rt != 31)
regs->regs[rt] = arch_counter_get_cntvct(); regs->regs[rt] = arch_counter_get_cntvct();
regs->pc += 4; regs->pc += 4;
......
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