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Commit 749b9ac8 authored by sol.yu's avatar sol.yu Committed by Devin Kim
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arm/dt: lenok: Fix the flickering on display


This issue happens when POLED PANEL gate driving voltage is unstable.
Adjust the panel driving voltage level to avoid this issue.

Change VGL to -7.5V from -6.5V. It doesn't affect on power.

Bug: 18087424
Change-Id: I985531ef3d2424306ca2eca2d571174a80491cd4
Signed-off-by: default avatarsol.yu <sol.yu@lge.com>
Signed-off-by: default avatarDevin Kim <dojip.kim@lge.com>
parent 6fbec55e
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...@@ -78,7 +78,7 @@ ...@@ -78,7 +78,7 @@
39 00 00 00 00 00 18 DB 39 00 00 00 00 00 18 DB
01 A9 00 92 FF 11 01 A9 00 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
05 01 00 00 80 00 01 39 /*Idle Mode On*/ 05 01 00 00 80 00 01 39 /*Idle Mode On*/
05 01 00 00 40 00 01 29 /*Display On*/ 05 01 00 00 40 00 01 29 /*Display On*/
...@@ -86,85 +86,85 @@ ...@@ -86,85 +86,85 @@
39 01 00 00 20 00 18 DB 39 01 00 00 20 00 18 DB
01 A9 40 92 FF 11 01 A9 40 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 30 00 18 DB 39 01 00 00 30 00 18 DB
01 A9 60 92 FF 11 01 A9 60 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 30 00 18 DB 39 01 00 00 30 00 18 DB
01 A9 80 92 FF 11 01 A9 80 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 30 00 18 DB 39 01 00 00 30 00 18 DB
01 A9 A0 92 FF 11 01 A9 A0 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 30 00 18 DB 39 01 00 00 30 00 18 DB
01 A9 C0 92 FF 11 01 A9 C0 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 20 00 18 DB 39 01 00 00 20 00 18 DB
01 A9 E0 92 FF 11 01 A9 E0 92 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 20 00 18 DB 39 01 00 00 20 00 18 DB
01 A9 00 93 FF 11 01 A9 00 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 20 00 18 DB 39 01 00 00 20 00 18 DB
01 A9 10 93 FF 11 01 A9 10 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 20 00 18 DB 39 01 00 00 20 00 18 DB
01 A9 20 93 FF 11 01 A9 20 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 20 00 18 DB 39 01 00 00 20 00 18 DB
01 A9 30 93 FF 11 01 A9 30 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 10 00 18 DB 39 01 00 00 10 00 18 DB
01 A9 40 93 FF 11 01 A9 40 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 10 00 18 DB 39 01 00 00 10 00 18 DB
01 A9 50 93 FF 11 01 A9 50 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 10 00 18 DB 39 01 00 00 10 00 18 DB
01 A9 60 93 FF 11 01 A9 60 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
39 01 00 00 00 00 18 DB 39 01 00 00 00 00 18 DB
01 A9 80 93 FF 11 01 A9 80 93 FF 11
1C 34 43 2F 84 85 1C 34 43 2F 84 85
40 65 27 28 12 12 40 67 27 28 12 12
12 00 00 29 10 /*40nit_30hz*/ 12 00 00 29 10 /*40nit_30hz*/
]; ];
qcom,mdss-dsi-idle-on-command-state = "dsi_hs_mode"; qcom,mdss-dsi-idle-on-command-state = "dsi_hs_mode";
......
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